Understanding RS Flip Flop using NOR & NAND Gates

This post is for the students of bifocal electronics for Understanding RS Flip Flops using NOR & NAND Gates. The RS Flip Flop using NOR gates is generally used in all types of flip flop circuits explanation because its first state is the N/C i.e. no change state.

During this state the output of the circuit is locked randomly into any one state i.e. SET state or RESET state.

Important Points about RS Flip Flop

  1. Flip is a semiconductor logic circuit.
  2. A flip flop has two stable states – SET state and RESET state.
  3. When a flip flop is SET it remains in that state for infinite time, unless we RESET it.
  4. When a flip flop is RESET it remains in that state for infinite time, unless we SET it.
  5. The property of flip flop to remain in a particular state for infinite time is called memory.
  6. When R=S=0, the circuit remains in N/C i.e. no change state.
  7. When R=0 and S=1, the flip flop is SET.
  8. When R=1 and S=0, the flip flop is RESET.
  9. When R=0 and S=1, the flip flop is SET.
  10. When R=S=1, the flip flop goes in FORBIDDEN state.
  11. After SETing the flip flop, it is not necessary to continue with the input signals as R=0 & S=1. You can remove them and make R=S=0. The circuit will continue to be in SET state.
  12. Similarly after RESETing the flip flop, it is not necessary to continue with the input signals as R=1 & S=0. You can remove them and make R=S=0. The circuit will continue to be in RESET state.
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Simple explanation on RS Flip Flop (free .pdf file) 179.92 KB 702 downloads

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RS Flip Flop using NOR Gates

In this circuit there are four possible states, as shown in the following simulated images. You can also watch the following video lecture to understand its working better.

Output state of circuit when inputs are R=S=0

Output state of circuit when inputs are R=S=0 i.e. RS Flip-flop is in N/C state

Output state of circuit when inputs are R=0 and S=1

Output state of circuit when inputs are R=0 and S=1 i.e. RS Flip-flop is in SET state

Output state of circuit when inputs are R=1 and S=0

Output state of circuit when inputs are R=1 and S=0 i.e. RS Flip-flop is in RESET state

Output state of circuit when inputs are R=S=1 i.e. RS Flip-flop is in Forbidden state

RS Flip Flop using NAND Gates

Watch the video to understand the four possible state of this circuit. Remember that the first state of this circuit is forbidden state. Hence this circuit generally not used in any explanation or even in any applications.

Video Lecture on RS Flip Flop

PCB Layout of RS Flip Flop

This is the actual size PCB layout of the above given circuit, simulated using a software. If you want to construct this circuit, then contact us to get FREE and actual size PCB layout HD copy (.jpg format) of the same.

The actual size PCB layout of the RS FF

The actual size PCB layout of the RS flip flop

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